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Review Article

JCR. 2019; 6(5): 192-199


Customized Digital Logic Circuit based design for Physical Unclonable Function

Poorna Chander Reddy, M. Siva Kumar, B. Murali Krishna, Syed Inthiyaz, Sk. Hasane Ahammad.

Abstract
Security, region, and vitality proficient natives are the basic squares for engaging start to finish mollified assurance in Integrated circuits (ICs). PUF is comparative physical security bubbly, which utilizes in-deterministic dissimilarities over the span of the assembling process, to deliver a particular and unclonable IC. In this paper, an advanced ongoing postpone based Intrinsic RO-PUF has been proposed to structure and distinguish an information challenge to validate and to create a reaction. RO-PUF configuration is executed on Digilent Nexys 2 FPGA and Spartan-3E FPGA sheets. The PUF configuration is approved by methods for outer assessment on FPGA by interfacing peripherals like VGA, LCD, and SSD to outside GPIO modules. In this exploration to assess the physical security at various assaults, unclonable capacities are disposed of utilizing this system. RO-PUF strategy has been performed on various conventions of electronic gadgets and checks how these techniques have been giving the security. A definite contrast, the RO-PUF technique and existed strategy presume that the proposed strategy has been great.

Key words: RO-PUF (Ring Oscillator - Physically Unclonable Function), Intrinsic PUF, FPGA, External evaluation, VGA, LCD, SSD, Area, Physical Security, Unclonable.



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