This paper gives a detailed design and implementation of an 8-bit ALU for using Manchester carry chain adder in
order to minimize the delay and power. The designed ALU is simulated using cadence virtuoso 45 nm process
technology. The obtained results were compared with the existed results and its clearly indicates the proposed 8 bit
ALU is more reliable and accurate with the existed architecture ,And also it occupies less area and faster.
Arithmetic and logic unit(ALU),Manchester carry chain full adder, Low power and less area.