Augmented Reality (AR) is a sensational paradigm where real world experiences are enhanced by virtual environment based on computer vision recognition algorithms for physical objects. The real-time image and video processing is challenging because of its computation and complex functions. Field Programmable Gate Arrays (FPGAs) with their reconfigurable architectures provide flexibility, better performance and high levels of parallelism. This paper proposes the implementation of AR using reconfigurable hardware such as Xilinx Zynq SoC (System on a Chip) based on SURF (Speeded-Up Robust Feature) algorithm. The integration of AR and reconfigurable hardware for realtime image processing applications such as detection and feature extraction of images is presented. The implementation results achieve better resource utilization of approximately about 4% of flip-flops, 12% of Look-up Tables (LUTs), 3% of DSP slices and 38% of Block RAMs (BRAMs) for object recognition images with 640x480 resolutions.
Key words: FPGAs, Augmented Reality, SoC, reconfigurable hardware and parallelism, Squeeze Det, Corner Net, SIFT
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