In this work, a fully MOSFET voltage reference (FMVR) circuit with a current consumption of 7.6 nA and a supply voltage of 1 V is proposed. To generate the complementary to absolute temperature (CTAT) voltage, the voltage of a PN junction generated by a PMOS transistor - which is part of the bias circuit - is used. Generation of proportional to absolute temperature (PTAT) voltage is carried-out by utilizing three stages of self-cascode transistors biased in the sub-threshold region. A fraction of the CTAT voltage is added to the PTAT voltage without using an additional circuit to enable acquiring an output reference voltage of about 0.648 V with minimal temperature dependence. The proposed voltage reference is simulated in 0.18 μm of CMOS process and its area occupation is 0.0023 mm2. The obtained post-layout simulation results demonstrate that the proposed FMVR has a temperature coefficient equivalent to 12.9 ppm/°C under the temperature variation from -25 °C to 120 °C. Moreover, the line regulation under supply voltage variation from 0.9 V to 2 V is found to be equal to 0.02 %/V, and a power supply rejection ratio of 44 dB is acquired. Comparing the main parameters of the proposed FMVR - to the state-of-the-art circuits - shows that it has higher efficiency with smaller area and lower power consumption.
Key words: Fully MOSFET voltage reference; Temperature coefficient; Proportional to absolute temperature; Complementary to absolute temperature; Line regulation; Power supply rejection ratio.
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