This paper experimentally investigates the impact of trap location and light illumination on the quasi-static Capacitance-Voltage (C-V) characteristics of metal-oxide-semiconductor (MOS) capacitors after heavy constant-current stress (CCS). It has been discovered that under illumination, the width of the dip region of the quasi-static C-V curve is increased as the CCS-induced damage of the SiO2 film is worse. In addition, clear hysteresis is observed in the quasi-static C-V curve under illumination. This behavior is basically not observed in the dark condition. This suggests photon-induced injection of electrons into the SiO2 film, and that they are transiently captured at traps and emitted from them. A theoretical and mathematical model is proposed to explain this dynamic process of electrons inside the SiO2 film of MOS capacitors, subjected to CCS-induced damage. Simulations verify that the model is physically appropriate, and that the behavior of the width of the dip region of the quasi-static C-V curve is quantitatively explained from the experimental result. Additional discussions of the model’s predictions are also provided.
Key words: MOS capacitor; Silicon oxide; C-V characteristics; Illumination; Dynamic charging; Traps; Stress-induced degradation.
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